Performance Modeling for Computer ArchitectsISBN: 978-0-8186-7094-7
Paperback
404 pages
October 1995, Wiley-IEEE Computer Society Press
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Preface.
Computer Performance Evaluation Methodology.
An Instruction Timing Model of CPU Performance.
On Parallel Processing Systems: Amdahl's Law Generalized and Some Results on Optimal Design.
The Nonuniform Distribution of Instruction-Level and Machine Parallelism and Its Effect on Performance.
Classification and Performance Evaluation of Instruction Buffering Techniques.
Characterization of Branch and Data Dependencies in Programs for Evaluating Pipeline Performance.
Optimal Pipelining.
Branch Strategies: Modeling and Optimization.
Footprints in the Cache.
An Analytical Cache Model.
Modeling Live and Dead Lines in Cache Memory Systems.
Optimal Partitioning of Cache Memory.
An Accurate and Efficient Performance Analysis Technique for Multiprocessor Snooping Cache-Consistency Protocols.
Analyzing Multiprocessor Cache Behavior Through Data Reference Modeling.
Analysis of Multiprocessors with Private Cache Memories.
Vector Access Performance in Parallel Memories Using a Skewed Storage Scheme.
Performance of Processor-Memory Interconnections for Multiprocessors.
General Model for Memory Interference in Multiprocessors and Mean Value Analysis.
Equilibrium Point Analysis of Memory Interference in Multiprocessor Systems.
Scalar Memory References in Pipelined Multiprocessors: A Performance Study.
Performance Measurement and Modeling to Evaluate Various Effects on a Shared Memory Multiprocessor.
Optimal Design of Multilevel Storage Hierarchies.
Analysis of the Periodic Update Write Policy for Disk Cache.
Models of DASD Subsystems with Multiple Access Paths: A Throughput-Driven Approach.
Synchronized Disk Interleaving.
Asynchronous Disk Interleaving: Approximating Access Delays.
An Analytic Performance Model of Disk Arrays.
About the Author.
Computer Performance Evaluation Methodology.
An Instruction Timing Model of CPU Performance.
On Parallel Processing Systems: Amdahl's Law Generalized and Some Results on Optimal Design.
The Nonuniform Distribution of Instruction-Level and Machine Parallelism and Its Effect on Performance.
Classification and Performance Evaluation of Instruction Buffering Techniques.
Characterization of Branch and Data Dependencies in Programs for Evaluating Pipeline Performance.
Optimal Pipelining.
Branch Strategies: Modeling and Optimization.
Footprints in the Cache.
An Analytical Cache Model.
Modeling Live and Dead Lines in Cache Memory Systems.
Optimal Partitioning of Cache Memory.
An Accurate and Efficient Performance Analysis Technique for Multiprocessor Snooping Cache-Consistency Protocols.
Analyzing Multiprocessor Cache Behavior Through Data Reference Modeling.
Analysis of Multiprocessors with Private Cache Memories.
Vector Access Performance in Parallel Memories Using a Skewed Storage Scheme.
Performance of Processor-Memory Interconnections for Multiprocessors.
General Model for Memory Interference in Multiprocessors and Mean Value Analysis.
Equilibrium Point Analysis of Memory Interference in Multiprocessor Systems.
Scalar Memory References in Pipelined Multiprocessors: A Performance Study.
Performance Measurement and Modeling to Evaluate Various Effects on a Shared Memory Multiprocessor.
Optimal Design of Multilevel Storage Hierarchies.
Analysis of the Periodic Update Write Policy for Disk Cache.
Models of DASD Subsystems with Multiple Access Paths: A Throughput-Driven Approach.
Synchronized Disk Interleaving.
Asynchronous Disk Interleaving: Approximating Access Delays.
An Analytic Performance Model of Disk Arrays.
About the Author.