Microprocessor Architectures: From VLIW to TTAISBN: 978-0-471-97157-3
Hardcover
428 pages
December 1997
 This is a Print-on-Demand title. It will be printed specifically to fill your order. Please allow an additional 10-15 days delivery time. The book is not returnable.
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ARCHITECTURES: OVERVIEW AND COMPLEXITY.
Problem Statement.
Trends in Computer Architecture.
Bus Complexity.
Complexity of Instruction Level Parallel Processors.
TRANSPORT TRIGGERING CONCEPT.
From VLIW to TTA.
An Example Transport Triggered Processor.
THE DESIGN SPACE OF TRANSPORT TRIGGERED ARCHITECTURES.
Transport Design Space.
Function Unit Design Space.
Register Unit Design Space.
Exception Support.
ARCHITECTURE EVALUATION AND SYNTHESIS.
Evaluation of Architecture Parameters.
Automatic Synthesis of Transport Triggered Processors.
Summary and Perspective.
Appendices.
Glossary.
References.
Index.
Problem Statement.
Trends in Computer Architecture.
Bus Complexity.
Complexity of Instruction Level Parallel Processors.
TRANSPORT TRIGGERING CONCEPT.
From VLIW to TTA.
An Example Transport Triggered Processor.
THE DESIGN SPACE OF TRANSPORT TRIGGERED ARCHITECTURES.
Transport Design Space.
Function Unit Design Space.
Register Unit Design Space.
Exception Support.
ARCHITECTURE EVALUATION AND SYNTHESIS.
Evaluation of Architecture Parameters.
Automatic Synthesis of Transport Triggered Processors.
Summary and Perspective.
Appendices.
Glossary.
References.
Index.
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