Digital Electronics: Principles, Devices and ApplicationsISBN: 978-0-470-03214-5
Hardcover
752 pages
September 2007
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1 Number Systems.
1.1 Analogue Versus Digital.
1.2 Introduction to Number Systems.
1.3 Decimal Number System.
1.4 Binary Number System.
1.4.1 Advantages.
1.5 Octal Number System.
1.6 Hexadecimal Number System.
1.7 Number Systems – Some Common Terms.
1.7.1 Binary Number System.
1.7.2 Decimal Number System.
1.7.3 Octal Number System.
1.7.4 Hexadecimal Number System.
1.8 Number Representation in Binary.
1.8.1 Sign-bit Magnitude.
1.8.2 1’s Complement.
1.8.3 2’s Complement.
1.9 Finding the Decimal Equivalent.
1.9.1 Binary-to-Decimal Conversion.
1.9.2 Octal-to-Decimal Conversion.
1.9.3 Hexadecimal-to-Decimal Conversion.
1.10 Decimal-to-Binary Conversion.
1.11 Decimal-to-Octal Conversion.
1.12 Decimal-to-Hexadecimal Conversion.
1.13 Binary–Octal and Octal–Binary Conversions.
1.14 Hex–Binary and Binary–Hex Conversions.
1.15 Hex–Octal and Octal–Hex Conversions.
1.16 The Four Axioms.
1.17 Floating-point Numbers.
1.17.1 Range of Numbers and Precision.
17.2 Floating-point Number Formats.
Review Questions.
Problems.
Further Reading.
2 Binary Codes.
2.1 Binary Coded Decimal.
2.1.1 BCD-to-Binary Conversion.
2.1.2 Binary-to-BCD Conversion.
2.1.3 Higher-density BCD Encoding.
2.1.4 Packed and Unpacked BCD Numbers.
2.2 Excess-3 Code.
2.3 Gray Code.
2.3.1 Binary–Gray Code Conversion.
2.3.2 Gray Code–Binary Conversion.
2.3.3 n-ary Gray Code.
2.3.4 Applications.
2.4 Alphanumeric Codes.
2.4.1 ASCII code.
2.4.2 EBCDIC code.
2.4.3 Unicode.
2.5 Seven-segment Display Code.
2.6 Error Detection and Correction Codes.
2.6.1 Parity Code.
2.6.2 Repetition Code.
2.6.3 Cyclic Redundancy Check Code.
2.6.4 Hamming Code.
Review Questions.
Problems.
Further Reading.
3 Digital Arithmetic.
3.1 Basic Rules of Binary Addition and Subtraction.
3.2 Addition of Larger-bit Binary Numbers.
3.2.1 Addition Using the 2’s Complement Method.
3.3 Subtraction of Larger-bit Binary Numbers.
3.3.1 Subtraction Using 2’s Complement Arithmetic.
3.4 BCD Addition and Subtraction in Excess-3 Code.
3.4.1 Addition.
3.4.2 Subtraction.
3.5 Binary Multiplication.
3.5.1 Repeated Left-Shift and Add Algorithm.
3.5.2 Repeated Add and Right-Shift Algorithm.
3.6 Binary Division.
3.6.1 Repeated Right-Shift and Subtract Algorithm.
3.6.2 Repeated Subtract and Left-Shift Algorithm.
3.7 Floating-point Arithmetic.
3.7.1 Addition and Subtraction.
3.7.2 Multiplication and Division.
Review Questions.
Problems.
Further Reading.
4 Logic Gates and Related Devices.
4.1 Positive and Negative Logic.
4.2 Truth Table.
4.3 Logic Gates.
4.3.1 OR Gate.
4.3.2 AND Gate.
4.3.3 NOT Gate.
4.3.4 EXCLUSIVE-OR Gate.
4.3.5 NAND Gate.
4.3.6 NOR Gate.
4.3.7 EXCLUSIVE-NOR Gate.
4.3.8 INHIBIT Gate.
4.4 Universal Gates.
4.5 Gates with Open Collector/Drain Outputs.
4.6 Tristate Logic Gates.
4.7 AND-OR-INVERT Gates.
4.8 Schmitt Gates.
4.9 Special Output Gates.
4.10 Fan-out of Logic Gates.
4.11 Buffers and Transceivers.
4.12 IEEE/ANSI Standard Symbols.
4.12.1 IEEE/ANSI Standards – Salient Features.
4.12.2 ANSI Symbols for Logic Gate ICs.
4.13 Some Common Applications of Logic Gates.
4.13.1 OR Gate.
4.13.2 AND Gate.
4.13.3 EX-OR/EX-NOR Gate.
4.13.4 Inverter.
4.14 Application-relevant Information.
Review Questions.
Problems.
Further Reading.
5 Logic Families.
5.1 Logic Families – Significance and Types.
5.1.1 Significance.
5.1.2 Types of Logic Family.
5.2 Characteristic Parameters.
5.3 Transistor Transistor Logic (TTL).
5.3.1 Standard TTL.
5.3.2 Other Logic Gates in Standard TTL.
5.3.3 Low-power TTL.
5.3.4 High-power TTL (74H/54H).
5.3.5 Schottky TTL (74S/54S).
5.3.6 Low-power Schottky TTL (74LS/54LS).
5.3.7 Advanced Low-power Schottky TTL (74ALS/54ALS).
5.3.8 Advanced Schottky TTL (74AS/54AS).
5.3.9 Fairchild Advanced Schottky TTL (74F/54F).
5.3.10 Floating and Unused Inputs.
5.3.11 Current Transients and Power Supply Decoupling.
5.4 Emitter Coupled Logic (ECL).
5.4.1 Different Subfamilies.
5.4.2 Logic Gate Implementation in ECL.
5.4.3 Salient Features of ECL.
5.5 CMOS Logic Family.
5.5.1 Circuit Implementation of Logic Functions.
5.5.2 CMOS Subfamilies.
5.6 BiCMOS Logic.
5.6.1 BiCMOS Inverter.
5.6.2 BiCMOS NAND.
5.7 NMOS and PMOS Logic.
5.7.1 PMOS Logic.
5.7.2 NMOS Logic.
5.8 Integrated Injection Logic (I2L) Family.
5.9 Comparison of Different Logic Families.
5.10 Guidelines to Using TTL Devices.
5.11 Guidelines to Handling and Using CMOS Devices.
5.12 Interfacing with Different Logic Families.
5.12.1 CMOS-to-TTL Interface.
5.12.2 TTL-to-CMOS Interface.
5.12.3 TTL-to-ECL and ECL-to-TTL Interfaces.
5.12.4 CMOS-to-ECL and ECL-to-CMOS Interfaces.
5.13 Classification of Digital ICs.
5.14 Application-relevant Information.
Review Questions.
Problems.
Further Reading.
6 Boolean Algebra and Simplification Techniques.
6.1 Introduction to Boolean Algebra.
6.1.1 Variables, Literals and Terms in Boolean Expressions.
6.1.2 Equivalent and Complement of Boolean Expressions.
6.1.3 Dual of a Boolean Expression.
6.2 Postulates of Boolean Algebra.
6.3 Theorems of Boolean Algebra.
6.3.1 Theorem 1 (Operations with ‘0’ and ‘1’).
6.3.2 Theorem 2 (Operations with ‘0’ and ‘1’).
6.3.3 Theorem 3 (Idempotent or Identity Laws).
6.3.4 Theorem 4 (Complementation Law).
6.3.5 Theorem 5 (Commutative Laws).
6.3.6 Theorem 6 (Associative Laws).
6.3.7 Theorem 7 (Distributive Laws) .
6.3.8 Theorem 8.
6.3.9 Theorem 9.
6.3.10 Theorem 10 (Absorption Law or Redundancy Law).
6.3.11 Theorem 11.
6.3.12 Theorem 12 (Consensus Theorem).
6.3.13 Theorem 13 (DeMorgan’s Theorem).
6.3.14 Theorem 14 (Transposition Theorem).
6.3.15 Theorem 15.
6.3.16 Theorem 16.
6.3.17 Theorem 17 (Involution Law).
6.4 Simplification Techniques.
6.4.1 Sum-of-Products Boolean Expressions.
6.4.2 Product-of-Sums Expressions.
6.4.3 Expanded Forms of Boolean Expressions.
6.4.4 Canonical Form of Boolean Expressions.
6.4.5 _ and _ Nomenclature.
6.5 Quine–McCluskey Tabular Method.
6.5.1 Tabular Method for Multi-Output Functions.
6.6 Karnaugh Map Method.
6.6.1 Construction of a Karnaugh Map.
6.6.2 Karnaugh Map for Boolean Expressions with a Larger Number of Variables.
6.6.3 Karnaugh Maps for Multi-Output Functions.
Review Questions.
Problems.
Further Reading.
7 Arithmetic Circuits.
7.1 Combinational Circuits.
7.2 Implementing Combinational Logic.
7.3 Arithmetic Circuits – Basic Building Blocks.
7.3.1 Half-adder.
7.3.2 Full Adder.
7.3.3 Half-Subtractor.
7.3.4 Full Subtractor.
7.3.5 Controlled Inverter.
7.4 Adder–Subtractor.
7.5 BCD Adder.
7.6 Carry Propagation–Look-ahead Carry Generator.
7.7 Arithmetic Logic Unit (ALU).
7.8 Multipliers.
7.9 Magnitude Comparator.
7.9.1 Cascading Magnitude Comparators.
7.10 Application-relevant Information.
Review Questions.
Problems.
Further Reading.
8 Multiplexers and Demultiplexers.
8.1 Multiplexer.
8.1.1 Inside the Multiplexer.
8.1.2 Implementing Boolean Functions with Multiplexers.
8.1.3 Multiplexers for Parallel-to-Serial Data Conversion.
8.1.4 Cascading Multiplexer Circuits.
8.2 Encoders.
8.2.1 Priority Encoder.
8.3 Demultiplexers and Decoders.
8.3.1 Implementing Boolean Functions with Decoders.
8.3.2 Cascading Decoder Circuits.
8.4 Application-relevant Information.
Review Questions.
Problems.
Further Reading.
9 Programmable Logic Devices.
9.1 Fixed Logic Versus Programmable Logic.
9.1.1 Advantages and Disadvantages.
9.2 Programmable Logic Devices – An Overview.
9.2.1 Programmable ROMs.
9.2.2 Programmable Logic Array.
9.2.3 Programmable Array Logic.
9.2.4 Generic Array Logic.
9.2.5 Complex Programmable Logic Device.
9.2.6 Field-programmable Gate Array.
9.3 Programmable ROMs.
9.4 Programmable Logic Array.
9.5 Programmable Array Logic.
9.5.1 PAL Architecture.
9.5.2 PAL Numbering System.
9.6 Generic Array Logic.
9.7 Complex Programmable Logic Devices.
9.7.1 Internal Architecture.
9.7.2 Applications.
9.8 Field-programmable Gate Arrays.
9.8.1 Internal Architecture.
9.8.2 Applications.
9.9 Programmable Interconnect Technologies.
9.9.1 Fuse.
9.9.2 Floating-gate Transistor Switch.
9.9.3 Static RAM-controlled Programmable Switches.
9.9.4 Antifuse.
9.10 Design and Development of Programmable Logic Hardware.
9.11 Programming Languages.
9.11.1 ABEL-Hardware Description Language.
9.11.2 VHDL-VHSIC Hardware Description Language.
9.11.3 Verilog.
9.11.4 Java HDL.
9.12 Application Information on PLDs.
9.12.1 SPLDs.
9.12.2 CPLDs.
9.12.3 FPGAs.
Review Questions.
Problems.
Further Reading.
10 Flip-flops and Related Devices.
10.1 Multivibrator.
10.1.1 Bistable Multivibrator.
10.1.2 Schmitt Trigger.
10.1.3 Monostable Multivibrator.
10.1.4 Astable Multivibrator.
10.2 Integrated Circuit (IC) Multivibrators.
10.2.1 Digital IC-based Monostable Multivibrator.
10.2.2 IC Timer-based Multivibrators.
10.3 R-S Flip-flop.
10.3.1 R-S Flip-flop with Active LOW Inputs.
10.3.2 R-S Flip-flop with Active HIGH Inputs.
10.3.3 Clocked R-S Flip-flop 377.
10.4 Level-triggered and Edge-triggered Flip-flops.
10.5 J-K Flip-flop.
10.5.1 J-K Flip-flop with PRESET and CLEAR Inputs.
10.5.2 Master–Slave Flip-flops.
10.6 Toggle Flip-flop (T Flip-flop).
10.6.1 J-K Flip-flop as a Toggle Flip-flop.
10.7 D Flip-flop.
10.7.1 J-K Flip-flop as D Flip-flop.
10.7.2 D Latch.
10.8 Synchronous and Asynchronous Inputs.
10.9 Flip-flop Timing Parameters.
10.9.1 Set-up and Hold Times.
10.9.2 Propagation Delay.
10.9.3 Clock Pulse HIGH and LOW Times.
10.9.4 Asynchronous Input Active Pulse Width.
10.9.5 Clock Transition Times.
10.9.6 Maximum Clock Frequency.
10.10 Flip-flop Applications.
10.10.1 Switch Debouncing.
10.10.2 Flip-flop Synchronization.
10.10.3 Detecting the Sequence of Edges.
10.11 Application-relevant Data.
Review Questions.
Problems.
Further Reading.
11 Counters and Registers.
11.1 Ripple (Asynchronous) Counter.
11.1.1 Propagation Delay in Ripple Counters.
11.2 Synchronous Counter.
11.3 Modulus of a Counter.
11.4 Binary Ripple Counter – Operational Basics.
11.4.1 Binary Ripple Counters with a Modulus of Less than 2N.
11.4.2 Ripple Counters in IC Form.
11.5 Synchronous (or Parallel) Counters.
11.6 UP/DOWN Counters.
11.7 Decade and BCD Counters.
11.8 Presettable Counters.
11.8.1 Variable Modulus with Presettable Counters.
11.9 Decoding a Counter.
11.10 Cascading Counters.
11.10.1 Cascading Binary Counters.
11.10.2 Cascading BCD Counters.
11.11 Designing Counters with Arbitrary Sequences.
11.11.1 Excitation Table of a Flip-flop.
11.11.2 State Transition Diagram.
11.11.3 Design Procedure.
11.12 Shift Register.
11.12.1 Serial-in Serial-out Shift Register.
11.12.2 Serial-in Parallel-out Shift Register.
11.12.3 Parallel-in Serial-out Shift Register.
11.12.4 Parallel-in, Parallel-out Shift Register.
11.12.5 Bidirectional Shift Register.
11.12.6 Universal Shift Register.
11.13 Shift Register Counters.
11.13.1 Ring Counter.
11.13.2 Shift Counter.
11.14 IEEE/ANSI Symbology for Registers and Counters.
11.14.1 Counters.
11.14.2 Registers.
11.15 Application-relevant Information.
Review Questions.
Problems.
Further Reading.
12 Data Conversion Circuits – D/A and A/D Converters.
12.1 Digital-to-Analogue Converters.
12.1.1 Simple Resistive Divider Network for D/A Conversion.
12.1.2 Binary Ladder Network for D/A Conversion.
12.2 D/A Converter Specifications.
12.2.1 Resolution.
12.2.2 Accuracy.
12.2.3 Conversion Speed or Settling Time.
12.2.4 Dynamic Range.
12.2.5 Nonlinearity and Differential Nonlinearity.
12.2.6 Monotonocity.
12.3 Types of D/A Converter.
12.3.1 Multiplying D/A Converters.
12.3.2 Bipolar-output D/A Converters.
12.3.3 Companding D/A Converters.
12.4 Modes of Operation.
12.4.1 Current Steering Mode of Operation.
12.4.2 Voltage Switching Mode of Operation.
12.5 BCD-input D/A Converter.
12.6 Integrated Circuit D/A Converters.
12.6.1 DAC-08.
12.6.2 DAC-0808.
12.6.3 DAC-80.
12.6.4 AD 7524.
12.6.5 DAC-1408/DAC-1508.
12.7 D/A Converter Applications.
12.7.1 D/A Converter as a Multiplier.
12.7.2 D/A converter as a Divider.
12.7.3 Programmable Integrator.
12.7.4 Low-frequency Function Generator.
12.7.5 Digitally Controlled Filters.
12.8 A/D Converters.
12.9 A/D Converter Specifications.
12.9.1 Resolution.
12.9.2 Accuracy.
12.9.3 Gain and Offset Errors.
12.9.4 Gain and Offset Drifts.
12.9.5 Sampling Frequency and Aliasing Phenomenon.
12.9.6 Quantization Error.
12.9.7 Nonlinearity.
12.9.8 Differential Nonlinearity.
12.9.9 Conversion Time.
12.9.10 Aperture and Acquisition Times.
12.9.11 Code Width.
12.10 A/D Converter Terminology.
12.10.1 Unipolar Mode Operation.
12.10.2 Bipolar Mode Operation.
12.10.3 Coding.
12.10.4 Low Byte and High Byte.
12.10.5 Right-justified Data, Left-justified Data.
12.10.6 Command Register, Status Register.
12.10.7 Control Lines.
12.11 Types of A/D Converter.
12.11.1 Simultaneous or Flash A/D Converters.
12.11.2 Half-flash A/D Converter.
12.11.3 Counter-type A/D Converter.
12.11.4 Tracking-type A/D Converter.
12.11.5 Successive Approximation Type A/D Converter.
12.11.6 Single-, Dual- and Multislope A/D Converters.
12.11.7 Sigma-Delta A/D Converter.
12.12 Integrated Circuit A/D Converters.
12.12.1 ADC-0800.
12.12.2 ADC-0808.
12.12.3 ADC-80/AD ADC-80.
12.12.4 ADC-84/ADC-85/AD ADC-84/AD ADC-85/AD-5240.
12.12.5 AD 7820.
12.12.6 ICL 7106/ICL 7107.
12.13 A/D Converter Applications.
12.13.1 Data Acquisition.
Review Questions.
Problems.
Further Reading.
13 Microprocessors.
13.1 Introduction to Microprocessors.
13.2 Evolution of Microprocessors.
13.3 Inside a Microprocessor.
13.3.1 Arithmetic Logic Unit (ALU).
13.3.2 Register File.
13.3.3 Control Unit.
13.4 Basic Microprocessor Instructions.
13.4.1 Data Transfer Instructions.
13.4.2 Arithmetic Instructions.
13.4.3 Logic Instructions.
13.4.4 Data Transfer or Branch or Program Control Instructions.
13.4.5 Machine Control Instructions.
13.5 Addressing Modes.
13.5.1 Absolute or Memory Direct Addressing Mode.
13.5.2 Immediate Addressing Mode.
13.5.3 Register Direct Addressing Mode.
13.5.4 Register Indirect Addressing Mode.
13.5.5 Indexed Addressing Mode.
13.5.6 Implicit Addressing Mode and Relative Addressing Mode.
13.6 Microprocessor Selection.
13.6.1 Selection Criteria.
13.6.2 Microprocessor Selection Table for Common Applications.
13.7 Programming Microprocessors.
13.8 RISC Versus CISC Processors.
13.9 Eight-bit Microprocessors.
13.9.1 8085 Microprocessor.
13.9.2 Motorola 6800 Microprocessor.
13.9.3 Zilog Z80 microprocessor.
13.10 16-bit Microprocessors.
13.10.1 8086 Microprocessor.
13.10.2 80186 Microprocessor.
13.10.3 80286 Microprocessor.
13.10.4 MC68000 Microprocessor.
13.11 32-bit Microprocessors.
13.11.1 80386 Microprocessor.
13.11.2 MC68020 Microprocessor.
13.11.3 MC68030 Microprocessor.
13.11.4 80486 Microprocessor.
13.11.5 PowerPC RISC Microprocessors.
13.12 Pentium Series of Microprocessors.
13.12.1 Salient Features.
13.12.2 Pentium Pro Microprocessor.
13.12.3 Pentium II Series.
13.12.4 Pentium III and Pentium IV Microprocessors.
13.12.5 Pentium M, D and Extreme Edition Processors.
13.12.6 Celeron and Xeon Processors.
13.13 Microprocessors for Embedded Applications.
13.14 Peripheral Devices.
13.14.1 Programmable Timer/Counter.
13.14.2 Programmable Peripheral Interface.
13.14.3 Programmable Interrupt Controller.
13.14.4 DMA Controller.
13.14.5 Programmable Communication Interface.
13.14.6 Math Coprocessor.
13.14.7 Programmable Keyboard/Display Interface.
13.14.8 Programmable CRT Controller.
13.14.9 Floppy Disk Controller.
13.14.10 Clock Generator.
13.14.11 Octal Bus Transceiver.
Review Questions.
Further Reading.
14 Microcontrollers.
14.1 Introduction to the Microcontroller.
14.1.1 Applications.
14.2 Inside the Microcontroller.
14.2.1 Central Processing Unit (CPU).
14.2.2 Random Access Memory (RAM).
14.2.3 Read Only Memory (ROM).
14.2.4 Special-function Registers.
14.2.5 Peripheral Components.
14.3 Microcontroller Architecture.
14.3.1 Architecture to Access Memory.
14.3.2 Mapping Special-function Registers into Memory Space.
14.3.3 Processor Architecture.
14.4 Power-saving Modes.
14.5 Application-relevant Information.
14.5.1 Eight-bit Microcontrollers.
14.5.2 16-bit Microcontrollers.
14.5.3 32-bit Microcontrollers.
14.6 Interfacing Peripheral Devices with a Microcontroller.
14.6.1 Interfacing LEDs.
14.6.2 Interfacing Electromechanical Relays.
14.6.3 Interfacing Keyboards.
14.6.4 Interfacing Seven-segment Displays.
14.6.5 Interfacing LCD Displays.
14.6.6 Interfacing A/D Converters.
14.6.7 Interfacing D/A Converters.
Review Questions.
Problems.
Further Reading.
15 Computer Fundamentals.
15.1 Anatomy of a Computer.
15.1.1 Central Processing Unit.
15.1.2 Memory.
15.1.3 Input/Output Ports.
15.2 A Computer System.
15.3 Types of Computer System.
15.3.1 Classification of Computers on the Basis of Applications.
15.3.2 Classification of Computers on the Basis of the Technology Used.
15.3.3 Classification of Computers on the Basis of Size and Capacity.
15.4 Computer Memory.
15.4.1 Primary Memory.
15.5 Random Access Memory.
15.5.1 Static RAM.
15.5.2 Dynamic RAM.
15.5.3 RAM Applications.
15.6 Read Only Memory.
15.6.1 ROM Architecture.
15.6.2 Types of ROM.
15.6.3 Applications of ROMs.
15.7 Expanding Memory Capacity.
15.7.1 Word Size Expansion.
15.7.2 Memory Location Expansion.
15.8 Input and Output Ports.
15.8.1 Serial Ports.
15.8.2 Parallel Ports.
15.8.3 Internal Buses.
15.9 Input/Output Devices.
15.9.1 Input Devices.
15.9.2 Output Devices.
15.10 Secondary Storage of Auxiliary Storage.
15.10.1 Magnetic Storage Devices.
15.10.2 Magneto-optical Storage Devices.
15.10.3 Optical Storage Devices.
15.10.4 USB Flash Drive.
Review Questions.
Problems.
Further Reading.
16 Troubleshooting Digital Circuits and Test Equipment.
16.1 General Troubleshooting Guidelines.
16.1.1 Faults Internal to Digital Integrated Circuits.
16.1.2 Faults External to Digital Integrated Circuits.
16.2 Troubleshooting Sequential Logic Circuits.
16.3 Troubleshooting Arithmetic Circuits.
16.4 Troubleshooting Memory Devices.
16.4.1 Troubleshooting RAM Devices.
16.4.2 Troubleshooting ROM Devices.
16.5 Test and Measuring Equipment.
16.6 Digital Multimeter.
16.6.1 Advantages of Using a Digital Multimeter.
16.6.2 Inside the Digital Meter.
16.6.3 Significance of the Half-digit.
16.7 Oscilloscope.
16.7.1 Importance of Specifications and Front-panel Controls.
16.7.2 Types of Oscilloscope.
16.8 Analogue Oscilloscopes.
16.9 CRT Storage Type Analogue Oscilloscopes.
16.10 Digital Oscilloscopes.
16.11 Analogue Versus Digital Oscilloscopes.
16.12 Oscilloscope Specifications.
16.12.1 Analogue Oscilloscopes.
16.12.2 Analogue Storage Oscilloscope.
16.12.3 Digital Storage Oscilloscope.
16.13 Oscilloscope Probes.
16.13.1 Probe Compensation.
16.14 Frequency Counter.
16.14.1 Universal Counters – Functional Modes.
16.14.2 Basic Counter Architecture.
16.14.3 Reciprocal Counters.
16.14.4 Continuous-count Counters.
16.14.5 Counter Specifications.
16.14.6 Microwave Counters.
16.15 Frequency Synthesizers and Synthesized Function/Signal Generators.
16.15.1 Direct Frequency Synthesis.
16.15.2 Indirect Synthesis.
16.15.3 Sampled Sine Synthesis (Direct Digital Synthesis).
16.15.4 Important Specifications.
16.15.5 Synthesized Function Generators.
16.15.6 Arbitrary Waveform Generator.
16.16 Logic Probe.
16.17 Logic Analyser.
16.17.1 Operational Modes.
16.17.2 Logic Analyser Architecture.
16.17.3 Key Specifications.
16.18 Computer–Instrument Interface Standards.
16.18.1 IEEE-488 Interface.
16.19 Virtual Instrumentation.
16.19.1 Use of Virtual Instruments.
16.19.2 Components of a Virtual Instrument.
Review Questions.
Problems.
Further Reading.
Index.